Thursday, August 18, 2022

New SPI logic installed, testing the link again

OPEN SOURCE SPI LOGIC SUBSTITUTED

I had previously used a very well written set of SPI modules and decided to put that into my project. This was part of the SPI MASTER/SLAVE INTERFACE project http://opencores.org/project,spi_master_slave written by Jonny Doin (jdoin@opencores.org, jonnydoin@gmail.com) as described in the code. 

This operates differently from the code I first wrote, thus it forced some changes to the state machine that was driving the emission and reception of words coming over the SPI link. I successfully tested those on the simulator. 

LATCHING FIRST WORD TO DISPLAY VIA LEDS

As a way of further testing what is being received, I added in a register that is latched from the input at the time we receive the first word of the transaction. That was now visible on the four LEDs (in groups of four bits) as I set the slide switches to 0010, 0011, 0100 and 0101. I should see the left five bits showing the command code, either 10101 or 01010 depending on which of the two transactions has last been processed. 

RESULTS OF THE TEST RUN

The FPGA was latching the proper first words but the transactions were not completing. Keep in mind that I am using a scope to look at the transactions, triggering on either the start of the transaction or the end of it, using the SPItransaction signal. I was not looking at the entire 325 word transaction.

MOSI yellow, SS green and SPItransaction blue

That was the key to my first discovery. The code on the Arduino was only sending one word of data, instead the transaction was too short. I wouldn't have spotted this from the FPGA simulation since my testbench was what generated the traffic, not the Arduino. 

With that corrected, I was still not getting through to the end of the transaction successfully. I will need to instrument carefully to watch this both with a scope on diagnostic output pins and via the LEDs on the board. 

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