Wednesday, August 24, 2022

Watching state machines and hunting for defects

INDICATIONS ADDED TO SEE STATE MACHINES NOT AT IDLE

I set up a set of indications to display on the four LEDs for each of the state machines, illuminated when it is not at its idle or starting position. That way I can quickly find any machine that is stalled or active when it shouldn't be. 

I also set up the red color of one of the multicolor LEDs to light when ANY of the state machines are not at idle, a very immediate visual cue that something odd is happening. While it is processing transactions it should turn red, reflecting the activity, but then turn off in quiet times. 

OBSERVATIONS DURING TESTING

I could see that the main SPI transaction state machine was not returning to idle. This made no sense as every state where it can wait includes a top priority test that if the SPItransaction signal is off, it returns to idle. I will be instrumenting this more thoroughly as this is consistent with the flawed behavior I was seeing - one attempt at accessing RAM but no more than the first was attempted. 

Obviously I will be studying this one closely for any situation that might cause it to lock up, but also planning on the best instrumentation I can install to locate the problem. I have some ideas on how I can accomplish this without having to make multiple 25 minute runs reprogramming the FPGA board in between investigations. 

PCBS ARRIVED AND ONE NIT DISCOVERED

My PCBs arrived and look great. There is an extraneous REF comment on the silkscreen next to the four mounting holes, but that is irrelevant to its functionality. When I began looking closely at my connectors and cables for the links to the 1130 drive electronics I realized that I had bought IDE connectors not generic 40 pin connectors.

This is bad because there is a blank pin position on an IDE cable, right where I intended to run a signal. Both the IDE cable and the connector I bought to anchor the wire wrap lines has this missing pin. Fortunately the connectors for the PCB itself are full 40 pin units.

I have new cables coming in two days which resolve the blank position issue, but I do have to work around the missing pin on the anchor board for the wire wrap leads. It appears that I can press in a pin and solder that onto the board, restoring the connector to full functionality, but it will depend on what pins I can scrounge up. 

Finished PCB

3 comments:

  1. Hi Carl,
    I know almost nothing about FPGAs, so I don't know how difficult this would be. And it would be a side project not directly related to what you're trying to accomplish. But FWIW, and given how long it takes to regenerate the FPGA contents, I keep thinking maybe it would be worth creating an LED panel with as many LEDs, 7-segment displays, etc. as you pleased with an SPI interface to the FPGA. Maybe with an Arduino on the LED panel to interpret the commands received from the FPGA?
    I'm pretty sure you've thought of this yourself and rejected the idea for some reason. :-)

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    Replies
    1. Basically you fool yourself incrementally, where at each step in seems as if you can find the problem without investing the unfront time to engineer the SPI link and the remote Arduino and wire up LEDs. At least that is why I did things this way.

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    2. The easiest method is to power a string of Neopixels which requires only one output pin on the FPGA to address any number of LEDs I wish to connect. With an Arduino it is a straightforward call to a library. A bit more work on the FPGA but not too much. The messiest part is routing all those signals I might ever need to watch onto a huge shift register where each position is one LED on the string.

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