FINISHED SLT PIN INSTALLATION
All 72 pins are soldered in place forming the place where cables T1, T3 and T4 plug into the board in lieu of them plugging into the core memory backplane in gate B, compartment C1 of the IBM 1130.
SWAPPED OUT THE AND GATES FOR NAND GATES ON THE SENSE OUTPUT
My rush order of the 74LS03 chips in surface mount SOIC-14 packages arrived and I soldered them onto the board, having previously removed the 74LS09 chips. This inverts the output for -Sense Bit x lines going back to the CPU, so that they blip down to ground for about 100 nanoseconds during a storage read if the corresponding bit in memory was a 1.
REMOVED OLD CAPACITORS FROM THE TIMING CHAINS
The modified capacitor values I determined for the pulse duration and delay from the onset of a storage read or write cycle mean that I have to remove the current capacitors from the board. The pads were cleaned up, ready to accept new components. When the parts order from Digikey arrive I w. ill put these on. In addition, I will install the 17 decoupling capacitors at that time
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