Tuesday, June 14, 2022

Hunting down the problem causing the Keyboard to not reset its request for IL4


The execution of an XIO instruction that has the Control function and area code 1 triggers the setting of the KBD Select latch. The immediate outcome of this activation is that the Select lamp on the console is illuminated and the keyboard restore magnets unlock the keyboard. 

Once the KBD Select latch is on, if a key is pressed, a microswitch under the keyboard closes contacts to emit the Hollerith code assigned to that keycap. Having any of the bits on will trigger a 25 millisecond single shot and that will cause the KBD Response latch to activate. When this is on, it raises a request for an interrupt on IL4. 

Presumably a routine is invoked from the interrupt handle for level 4 which issues an XIO with Read function for Area 1. That stores the Hollerith code from the device into the memory word addressed by the first word of the IOCC that is part of this XIO. It also triggers a different 25 millisecond single shot which fires the restore magnets to release the key, unlock the keyboard and remove the hollerith code for the previous keystroke. 

The KBD Response latch remains active and thus will continually request an IL4 interrupt so it must be reset. That occurs when an XIO is executed with the Sense Device Function, Area code 1 and with bit 15 set to 1. This is called an XIO Sense Device with Reset 15. 

That will flip off the KBD response latch. Thus, the normal process in an interrupt routine is to read the keystroke with XIO Read, turn off the response with XIO Sense Device Reset 15, then exit the interrupt level to continue normal processing. 

The device controller circuitry is fairly modest. It is three latches, two single shots, a lamp driver and a magnet driver, plus some combinatorial logic. It appeared pretty straightforward but there are subtleties in understanding it. For example, when the restore magnet unlocks the keyboard it also interrupts the microswitch gating the Hollerith data bits. When this goes off, but the KBD Select latch is on, it serves as a rest of the KBD Select latch. 

One has to understand the interaction with the physical peripheral to see why it is deselected on a read. It is not the read itself that removes the selection, it is the restore signal shot whose action indirectly drops the data bits that triggers the reset. 

I mention this because the way that the IBM latches are set or reset is through their edge triggered and gated set/reset inputs, something they call AC Triggers. A special gate can have multiple gates plus one trigger input. When all the gates are at logic low and the trigger input provides a falling edge, going from high down to logic low, a brief pulse is emitted. If any gate is high, nothing happens. If the trigger doesn't drop to 0, nothing happens. 

Triangles on left are low gate inputs, N is falling edge trigger

When I first looked at the simple logic to reset the KBD Response, I checked the inputs that go to the reset circuit. It has one gate that is the inverted output of the latch, thus it will only be low when the latch is active. It has another gate that will be low when the B Register Bit 1 is high. The trigger is an inverted signal representing XIO Sense Device Reset 15 and Area 1, so that when these two conditions become true, the inverted trigger signal falls to 0. 

It only activates the reset if, at the time it falls to 0, both gates are low. One is low because the latch is set, but the other is bit 1 of the B register. This may seem arcane so I need a brief discussion of how the XIO Sense DSW provides the sense bits to a program. 

When an XIO is executed with Sense DSW, it blocks access to memory during the E2 execution cycle and allows the device controller to raise bits that represent various conditions and exceptions. The KB controller uses bit 1 to indicate that a keypress was received and the KBD Response latch is set. 

Since we have an active KBD Response and I can see B Bit 1 is on, XIO Sense Reset 15 is active and Area 1 is active, I assumed the latch should reset. I burned time considering whether the latch card was faulty and wouldn't reset. I wasted time chasing the possibility that some defect was also triggering a set for the latch thus blocking the reset.

Ultimately, however, it comes down to the nature of the AC Trigger used for set and reset. The gate conditions must be low at the time that the trigger falls to zero. When I looked carefully at the timing, I saw that the B Bit 1 signal didn't become 1 until one T Clock cycle after the trigger fell to zero. Thus, at the time of the trigger the gating conditions weren't satisfied. 

Aha! The issue is in the relative timing of the trigger condition and the gating condition. I took a quick look at the generation of XIO Sense DSW Reset 15 and saw that it is gated by T-Clock state T6. That is, it should not turn on until step T6 in the execution cycle E2 (T Clock steps are T0 through T7 in each cycle). Since it was turning on in T2, but B Bit 1 wasn't gated until a later T step, the reset was failing. 

That is a perfect explanation of the failure and the root cause is going to be a failed connection or bad gate somewhere in the path that generates the T6 signal that forms the XIO Sense Reset 15 signal. 

As another aside, the logic family in SLT is a form of DTL (Diode Transistor Logic) and the way that it works is that a logic low level pulls a junction down through a diode. Absence of a pull to ground is the same as a logic high. That is, an open circuit at 0 volts is seen as a logic high, not a logic low. 

Somewhere in the chain that produces this T6 there is an broken connection, allowing an input to float and be seen as a logic high. Thus the rest of the chain believes it is T6 regardless of the actual T-Clock step we are in. 


When I return tomorrow I will have with me the database listing for the signals that produce T6 and its variants leading to the circuit producing the XIO Sense Device Reset 15 signal. Some slow and careful continuity checking will help me find the break in the signal patch. Wire wrap will bridge the missing path to restore operation. 

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