CHASING DOWN THE T6 PROBLEM FOR KEYBOARD INTERRUPT RESET
I wasted time by assuming that this was another failed trace on a backplane, rather than simply diagnosing it by following signals. I used the database, listed all the pins that should be connected across four backplanes and beeped out each one.
I chased down three places where I didn't find connectivity. One was for a card that is only configured if the 2501 Card Reader is supported, probably there would be a wire wrap connection for the signal to the pin in question. That was not an issue at all. The second place where I had no connectivity was an edge connector that would carry the signal over to the Synchronous Communications Adapter (SCA), another feature that is NOT on this system. The last was a mistypes pin number for where the pullup resistor for the net is configured. I had pin D04 listed in the database but it is clearly pin B13 instead, which did have a good connection.
Next up, good old fashioned debugging. I hooked the scope to the AND gate which combines +U Bit 15, the saved bit 15 from the IOCC used with the XIO, +XIO Sense Device, and +T6 Pwr 2. I could see right away that +T6 Pwr 2 was always asserted even when I was in T-Clock steps T0, T1, T2, T3, T4, T5 and T7.
I had probed the entire connectivity chain from that back to the gate which is fed by -T6 and all the paths were good. I then hooked up the scope to the input and output of the inverter which produces +T6 Pwr 2, in gate B, compartment A1 slot B6. It was a hex inverter SLT card (yes, the same as a single IC of just a few years later).
The input was high but the output was also high. That may have indicated a failed inverter on the card. I happed to have a four channel scope for the debugging so I also connected to the input and output of one of the other inverters, this one producing a signal at T4. It too was not working properly. I also observed some fuzz on the input pin of that inverter gate.
I opened the compartment to pull out the card but noticed right away that its rear edge was higher than the nearby cards. I quickly determined that it had NOT been properly seated back in the socket. I clicked it in place. The scope showed that both T4 and T6 signals were properly inverted.
Indeed, the interrupt level request is now switched off when an XIO requests a Sense Device with Bit 15 set. I saw the initial status from the Sense Device which included bit 1 on (KBD Response), but a second execution had bit 1 off since we had reset the request for interrupt service.
VERIFYING THE KEYBOARD IS NOW SOUND
I came up with a modified test program that will use interrupts, allowing me to type in multiple characters and see the code sitting in the accumulator. The mainline (non-interrupt) routine issues the XIO Control to select the keyboard and then waits. When I push start it loads the value read during the interrupt routine then waits a second time, before returning to reselect the keyboard. This gives me time to see the correct value in the ACC.
The interrupt routine will issue an XIO Read to put the data value in an agreed memory word, then resets the request for interrupt before branching out of the interrupt routine to the mainline spot where it sat doing a wait instruction until I hit a key.
I uploaded two short videos, the first showing my routine displaying the proper Hollerith code for various keypresses - A, D, 3, O, * and $. The second puts the machine in single instruction mode to let you see the interrupt level fire off when the key is pressed, then shut down after we branch out having reset the KBD Response state.
Showing the card codes -
Single Stepping through the interrupt routine -
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