Retrigger of 1130MRAM likely due to slight wobble on trigger signal

POST ON TI SUPPORT FORUM COVERS A SIMILAR ISSUE

I found a post where another engineer was having issues with the SN74LVC1G123 chip retriggering spuriously. The situation is slightly different, where the retriggering happens just before the input signal goes low again whereas in mine it happens in mid pulse during a bit of noise. 

The data sheet claims that two of the inputs have Schmitt triggers, the clear input I am using does not,  and will only trigger when passing a voltage threshold. That threshold should be below 2V. The forum post does say that the engineer decided the very slight dip near the end of their input was the cause. This is far from the 2V level but apparently does fire off the timer spuriously. 

The fact that my NAND gate does show a pulse means it too found the input had changed enough to change the logic state. The gate combines +Storage Read and +Storage Use to produce the trigger, which I see go low but with a very short pulse to high right where the retriggering occurs. 

I am going to return to my RC lowpass filter with more aggressive values to see if I can block the dip on the NAND output even with all 1s on the data word.