I spent four more hours fighting with the design tool to clean up the board design, after which I went through validating every shape and connection before placing the order. Near the end, I discovered that the design software for the transistor had an SOT-23 physical layout setup but it has the lone top electrode as the emitter, something that zero real transistors in this package would do.
I therefore have to update the design file for the transistor shape, see what it does to my board design and fight through all the consequences of the pins shifting around. I was ready to order all the parts and the board manufacture, but now I need to revamp the layout and recheck everything.
After another hour, having adjusted the component shape then rotated and rerouted the traces ot all 36 transistors, plus relocation of ground vias , I had a set of file that appear good. I will check them with some gerber file viewers to ensure they are good, before submitting them. This process took a couple of hours including iterations to satisfy one of the PCB fab web sites that conveniently checks designs.
I discovered that I had forgotten to add the capacitor that speeds up the cutoff of the transistors, to solve the delayed pulse problem I was experiencing. Further, I thought of some adjustments I want to make to my driver circuit that really should be tested with the 1130 before I commit the PCB. I therefore didn't send in the files to the fab house.
I also began taking the existing boards and fpga out of the interface box - a process of carefully cutting the 77 twisted pairs from four boards, labeling them with their main cable pin assignments, and setting them aside to wire up to the new boards.
I did some time domain simulations of my circuits on CircuitLab just to verify how the models work compared to what I see on the oscilloscope, before testing out some of my potential modifications.
DATACENTER SHED CONSTRUCTION
I epoxied the broken handle that bridges the two poles of the 240V circuit breaker, having received the new glue this afternoon. It is now curing in the shed, after which it will be installed on the breakers tomorrow.
I discovered that I had forgotten to add the capacitor that speeds up the cutoff of the transistors, to solve the delayed pulse problem I was experiencing. Further, I thought of some adjustments I want to make to my driver circuit that really should be tested with the 1130 before I commit the PCB. I therefore didn't send in the files to the fab house.
I also began taking the existing boards and fpga out of the interface box - a process of carefully cutting the 77 twisted pairs from four boards, labeling them with their main cable pin assignments, and setting them aside to wire up to the new boards.
I did some time domain simulations of my circuits on CircuitLab just to verify how the models work compared to what I see on the oscilloscope, before testing out some of my potential modifications.
DATACENTER SHED CONSTRUCTION
I epoxied the broken handle that bridges the two poles of the 240V circuit breaker, having received the new glue this afternoon. It is now curing in the shed, after which it will be installed on the breakers tomorrow.
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