Sunday, September 8, 2024

Checked signals from printer, voltages, still troubleshooting a continually spacing carriage

CHECKING INPUT SIGNALS FROM THE 1132 TO THE CONTROLLER LOGIC

I wasn't sure that the switches were still working properly nor that the switch signals we coming in correctly from the 1132. Since the interface uses a number of positive logic signals, any open circuit or failed part will appear to be asserting the logic signal. Image all the buttons appearing to be pressed simultaneously!

The circuit for debouncing charges a capacitor with 6V while the switch is unpressed, then discharges through a voltage divider (pair of resistors) to -3V. Thus the signals should appear to have a single digit negative voltage when not asserted, then deliver a pulse of about 4V. Holding a button down does nothing after the first pulse is emitted. 

I hooked the scope up to four signals at a time and verified the initial state as well as the operation of the button push. All the signals and the pushbuttons performed as they should. 

CHECKING VOLTAGES DELIVERED TO THE 1132 SLT BACKPLANE

The 1132 is fed power from the 1130 system - 230V AC, 12VDC and the main logic levels +6, +3 and -3V. A power supply inside the printer generates 48V to fire hammers and operate clutches for carriage movement. Everything checked out, all the power is good. 

DEBUGGING CARRIAGE SPACING AND RELATED INTERRUPTS

The symptom of this failure is the carriage continually running on the actual printer, the interrupt level 1 being raised, and the status to an XIO Sense Device showing carriage space response, carriage moving, and printer not ready bits (bits 2, 3 and 5). 

With a four channel scope, collecting data involves iterating to watch up to four signals at a time, hoping to find a causal signal at each step and proceeding back until a clear failure is spotted. Often time has to be devoted to studying the ALDs and deeply understanding the controller mechanisms so that you first understand what normal should look like and then can intelligently guess at possible defects. 

LINE SPACING LATCH IS ACTIVE

I found the signal -line space latch was at logic low, meaning that the latch was active. This fires the solenoid that unclutches the carriage allowing movement. This should be reset when the -Carr CB signal goes low, which is a 10 us pulse each time the carriage moves to a new vertical line position on the printer. 

SYMPTOMS TIED TO LATCHES BEING SET

The line space latch was set, but that should only take place when an XIO Control command is issued to Area 6 (the 1132 printer) and that command set bit 15 to request a space down of one line. This was never executed on the CPU, so the latch should not be triggered. 

When the line space latch is active (-line space latch goes to logic low) then the space carriage busy latch is set. This shows up as bit 3 with an XIO Sense DSW for the printer. It will only be reset when the Carr Space Int flipflop is reset after the XIO Sense DSW with a reset bit to clear the cause of the interrupt. 

When the -Carr CB pulse arrives, it resets the line space latch. When that latch goes to logic high, if the space carriage busy latch was set and the +Allow Space Int line is high from the printer, then we set the Carr Space Int flipflop which is one of the drivers of the request for an interrupt on IL1. The +Allow Space Int line is a debounced relay contact set on at the same time as the short -Carr CB pulse. 

The Carr Space Int flipflop shows up as bit 2 of the XIO Sense DSW. The other bit set in the DSW is bit 5, printer not ready, which is simply due to our not having pushed the Start button on the printer to make it ready. 

To sort out the mess above, which I am sure is hard to follow, I had to redraw schematics from two ALD pages plus several pages of the 1132 schematics in order to figure out how it all should work. The obvious conclusion is that somehow the line space latch is being triggered incorrectly, almost as soon as it is reset by the end of the line space movement from its previous iteration. 

The latch itself is implemented on a 3130 card which is a quad latch card, containing circuits to implement four latches. I had swapped this card with another 3130 from a different peripheral device controller, however the defect remained the same. I do have the schematics for the card, just in case.

The card which drives the inputs to the latch is a 509, consisting of ten inverters. I also have the schematics for this. Interestingly, the inverters do not use a pullup resistor making it hard to accurately observe the state of the signal with an oscilloscope, logic analyzer or VOM. I do have other 509 cards that I could swap, since I did not try changing this card. 

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