Finished wiring header blocks and verified operation of address and data connections

DATA CONNECTIONS FINISH THE HEADER BLOCK TO BACKPLANE CONNECTIONS

I used the wire wrap tool to link all 16 bit positions of the shared input-output device data bus up to the left side of the B1 header block. I then verified that there were no shorts to adjacent pins either on the header block or down on the card slot backplane pins. 

VERIFIED THAT DATA AND ADDRESS ARE INJECTED TO THE CPU

The connections for both address and data are inverted logic, thus pulling one of the pins to ground will assert that the associated bit position is 1. The nature of SLT gates allows me to pull them down as what IBM calls a wired-OR gate. With traditional digital electronics, I would have had to break the connection between the 1130 gate and its next destination, then wire those up to a new OR gate that will isolate the original 1130 gate and my new input. Fortunately this is not needed with the Diode Transistor Logic used in SLT.

The pins I connected to on the backplane for data are part of a wired-OR shared bus, the Input-Output bus. Every peripheral device is wired to this bus and will introduce any data that should be passed inbound to the 1130. Other devices on this bus include the 16 Console Entry Switches (CES) on the front of the console printer. 

When the 1130 is switched to Load mode, it routes the CES to the input-output bus. Any CES that is turned to 1 will pull down its bit position on the bus, but if the CES is turned to 0, it does nothing. Then when the Prog Start button is pushed, a memory cycle is triggered to load the input-output bus contents (usually the CES) to a core memory location. 

I left all the CES down, set to 0, thus none of them were pulling the input-output bus down. I then hooked a jumper to each of the 16 data positions on header B1 and the other end to ground. I hooked up to each position and observed the proper light illuminate on the Storage Buffer Register which reflects the bus when in Load mode. 

Next, I used Load mode to set the IAR to every address with just one address bit at 1 - 1000, 0800, 0400, etc. I stored the same value as the address in its location. Thus, if I were to load the IAR to address 0020, for example, in Display mode and push Prog Start, it would read 0020 and display the value therein which is 0020 due to my setup. 

That allowed me to test my address bits on the B1 header. I would connect a jumper between ground and each address pin, in turn, then push Reset and Prog Start while in Display mode. This caused the 1130 to take a memory cycle and display the contents of memory in the SBR. Each pin caused the machine to show an SBR value that matched my address jumper, proving that each address bit was working appropriately.